Job Description
Design complex flip-chip-BGA packages for high-speed SerDes and high-power delivery needs.
Collaborate with the worldwide R&D team to develop high-performance package designs for ASICs used in AI, networking, HPC, and 5G base stations.
Determine the necessary package type by analyzing the chip.
Assign pins and layout critical structures for SerDes, ADC/DAC, DDR, etc.
Apply knowledge of package-level signal integrity and power integrity to package designs.
Work closely with signal integrity and power integrity partners to gather requirements and de-risk engineering issues.
Route and develop structures, manage critical signal and power integrity tasks.