Job Description
Join Synopsys as a Layout Design Engineer focusing on high-speed SerDes physical interfaces. You will leverage your expertise in analog and mixed-signal CMOS circuit design in a collaborative environment.
As a detail-oriented Layout Design Engineer at Synopsys, you will contribute to the creation of robust layouts for complex integrated circuits. Your role will involve close collaboration with circuit designers and thorough layout verification to meet high performance and area requirements. With your in-depth knowledge of deep submicron CMOS technologies, you'll engage in mitigating signal integrity issues and optimizing for reliability.
Key Responsibilities:
• Design complex analog and mixed-signal CMOS layouts
• Collaborate with circuit designers for manufacturable layouts
• Perform comprehensive verification and floor planning
• Optimize layouts to minimize parasitic effects
• Document layout methodologies and validation result...
As a detail-oriented Layout Design Engineer at Synopsys, you will contribute to the creation of robust layouts for complex integrated circuits. Your role will involve close collaboration with circuit designers and thorough layout verification to meet high performance and area requirements. With your in-depth knowledge of deep submicron CMOS technologies, you'll engage in mitigating signal integrity issues and optimizing for reliability.
Key Responsibilities:
• Design complex analog and mixed-signal CMOS layouts
• Collaborate with circuit designers for manufacturable layouts
• Perform comprehensive verification and floor planning
• Optimize layouts to minimize parasitic effects
• Document layout methodologies and validation result...