Confidential

Senior ASIC Design Verification Engineer

📍 Location
toronto, on
⏰ Job Type
Full-time
📅 Posted
May 31, 2026
Apply Now

Job Description

Job Description:

We have partnered with a fast growing semiconductor company that recently went public. Our client isa leader in purpose-built connectivity solutions for data-centric systems. Currently they arelooking for experienced ASICDesign Verification Engineers with proven experience in all aspects of verification in UVM and C/C++. The candidate must have experience using high level programming languages such as C/C++ to communicate with System Verilog and/or UVM based environments to aid RTL simulation, CoSimulation and Emulation. Basic Qualifications:

Strong academic and technical background in electrical engineering. At minimum, a Bachelor’s in EE is required, and a Maser’s is preferred. 2+ years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications. Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to ...

Start Your Week Right!

Apply now and make every Monday exciting with Confidential

Apply for this Position